Jobs in Malaysia

Job Description: Mentor other engineers in using the verification infrastructure and creating test benches. Functional validation of products with both analog and digital…

Job Description: Working with design/micro-architect/architect teams to define verification strategy, planning and execution, driving verification methodologies etc.

Job Description: As senior/staff digital design engineer, this person is required to support all digital design activities on company products, design services as well as…

Job Description: Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power…

Job Description: Methods through various checks/verification/audit. Understand digital logic and timing requirement (setup/hold/uncertainties).

Job Description: As a Entry/Advanced Design Implementation engineer, the candidate will be supervised by a local manager, be engaged into projects to perform the synthesis, DFT…

Job Description: Performs digital circuit design, verification and layout, data path design and digital block synthesis. Performs custom digital circuit design and simulation.

Job Description: Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power…

Job Description: Writing detailed design specification and test plans in close collaboration with architecture, circuit designers and verification engineers.

Job Description: Proven record in ownership of RTL2GDS implementation from RTL Synthesis, PnR to timing, power and layout verification signoff.

Job Description: Train and mentor junior digital design engineers locally. Knowledge of UVM based verification and code coverage is a plus. BSc/MSc in EE or Computer Science.

Job Description: Good command and knowledge of digital design, design verification, timing closure and hardware debug. Experience in RTL design and verification with Verilog,…

Job Description: Equivalent and experience with IP/SoC design or verification development. Engages with the architects to define design and verification requirements based on…

Job Description: As a Principle Design Implementation engineer, the candidate will be supervised by a local manager, be engaged into projects to perform the synthesis, DFT…

Job Description: Developing and/or enhancing testbench or verification components such as UVCs, models, BFMs, with a priority on re-usability of Components.

Job Description: Proficient in IP level ASIC verification. You have a passion for modern, complex processor architecture, digital design, and verification in general.

Job Description: Over 5 years of digital IP verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flow.

Job Description: Involved in verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing…

Job Description: 4.Work with verification engineer to complete the functional verification. 3.Responsible for the basic function verification and formal verification.

Job Description: RTL module design, simulation test bench design and verification. Module RTL design, test bench development and module verification work experience is required.

Job Description: Expert on Verilog RTL design and has experience of large digital ASIC project. Experience in full ASIC design cycle: requirements definition, architectural and…

Job Description: Over 3 years of digital IP/SoC development. Good command of Verilog RTL design and has experience of large digital ASIC project.

Job Description: 1.3-5 years of hands-on experience in digital physical design. 5.Implement ECO’s to address functional bugs, timing and physical verification violations.

Job Description: Over 7 years of digital IP verification with SV/UVM/Formal Verification or new methodology of. The successful candidate will apply current functional…

Job Description: Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing…